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Researchers from the Polytechnic University of Valencia leading a European project to improve the design and performance of processors.

Parallel Architectures Group (GAP) of the Polytechnic University of Valencia leads NanoC, an ambitious European research project aimed at developing a new tool to optimize the design and operation of the processors and thus increase its fault tolerance, performance and reliability.
 

The project, funded by the European Commission, has a budget of 2.9 million and brings together seven entities (companies and research centers) leading European telecommunications sector. 

José Flich, main researcher from Parallel Architectures Group, explains that the development of this project will more efficiently interconnect the various components integrated into a single chip (through network-on-chip ) and ensure its operation even in extreme conditions. 

On their applications, from Parallel Architectures Group explains which may be numerous: from the field of medicine, to improve the reliability of the chips used in equipment for medical treatment to employees in transportation systems, military applications, computer entertainment and consumer electronics.
 

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