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Duato, Jose

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Position: Main Researcher (Full Professor) Duato, Jose
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Phone or fax: +34963877007x79705
Location: Valencia
Description:

Short Curriculum Vitae

The most significant achievements of José Duato, including transfer of his research results to industry, publication records, service to profession and international collaborations, are summarized below:

  • On his own, he developed several adaptive routing strategies to improve interconnection network performance. These strategies are so efficient and cost-effective that some of them have been implemented in the most powerful supercomputers, including the Cray T3E and Cray Black Widow supercomputers, the Compaq Alpha 21364 microprocessor used in the Alphaserver GS320 supercomputer, and the IBM BlueGene/L supercomputer. These supercomputers were among the most powerful ones when they were launched. In particular, the IBM Blue- Gene/L is the most powerful supercomputer today.
  • He developed, in collaboration with Xyratex (a UK company), a technique called Regional Explicit Congestion Notification (RECN), which is the only truly scalable congestion management technique for lossless networks to date. This result has been protected with two joint patents and RECN is currently being incorporated into the most important standard for future communication systems: Advanced Switching Interconnect.
  • He has collaborated with the IBM Zurich Research Laboratory (the only IBM research laboratory in Europe) since year 2001 until their Communications Department was closed. The main outcome of this collaboration are four joint patents with IBM (Xmorph, RXS, BFC, and AFC). Also, he and José Flich developed the In-Transit Buffer (ITB) routing technique. Myricom (a USA company) has included support for ITBs in its popular Myrinet network by means of a special ITB packet type.
  • He is the first author of a 500-page book published in the USA, which has become the most popular book on interconnection networks. Also, he has authored or co-authored more than 340 publications, including book chapters and papers in journals and conference proceedings. He advised or co-advised 22 PhD students.
  • He served as Associate Editor of IEEE Transactions on Computers, the oldest and most prestigious journal in the area of computers in history (55 year old). He also served as Associate Editor of IEEE Transactions on Parallel and Distributed Systems, the second most prestigious journal in the area of parallel computers, being the first European researcher who served in this capacity. Also, he is the only Spanish researcher that served as associate editor of both of these journals.
  • He was the General Co-Chair for the 2001 International Conference on Parallel Processing and played a vital role in bringing this prestigious conference to Valencia, being the first time that it was held in Europe. This is the oldest conference in the area of parallel computers (at that time it was in its 30th year). He served as the Program Chair (Chair of the Scientific Program Committee) of the 2004 International Symposium on High Performance Computer Architecture. This is one of the two most relevant international conferences in the broad area of computer architecture. Also, he served as Program Co-Chair of the 2005 International Conference on Parallel Processing, and as Steering Committee Member, Program Co-Chair, Program Vice-Chair or Program Committee Member in more than 55 international conferences and workshops, including the most prestigious ones in the area of parallel computers: ISCA, HPCA, ICS, ICPP, IPPS/SPDP, IPDPS, HiPC, and Euro-Par.
  • He collaborated with several researchers from foreign countries, including some of the most prestigious professors in the area of interconnection networks (Lionel M. Ni, Sudhakar Yalamanchili, Chita Das, Timothy M. Pinkston, Dhabaleswar K. Panda, and Anand Sivasubramaniam, all of them currently serving or having served as associate editors of one or both of the two most prestigious journals in the area of computers). In particular, he co-authored 51 papers with researchers from six USA Universities, a USA national laboratory, and two USA companies, and 22 additional papers with researchers from five European and Asian Universities, and a European company. He also filed a joint patent with a Norwegian and a U.S. researchers.
  • He was invited to present keynote speeches in several international conferences (eight) as well as invited talks in several universities and national laboratories in the USA (nine), Europe (two) and Asia (one), including University of Illinois at Urbana-Champaign, University of Southern California, Georgia Institute of Technology, Ohio State University, Michigan State University, Pennsylvania State University, and Los Alamos National Laboratory. He was also invited to present talks at the research laboratories of some leading computer companies (IBM, Compaq, Sun Microsystems, Intel). Also, he was invited to participate in panel sessions in several international conferences and workshops (eight).
  • He was invited to send recommendation letters to support the promotion of several Professors in the USA to Associate Professor and Full Professor, as well as award nominations. He also served on the PhD dissertation committee of several doctoral candidates at various universities in the USA, Canada and Europe.

 

An important aspect of the research developed by José Duato is that he followed a disruptive approach in several cases. Under this approach, existing solutions are discarded and a completely new and superior solution is proposed, analyzed, and evaluated, thus making previously existing solutions to become obsolete. Some examples of this approach follow:

  • Adaptive routing techniques that allow cyclic dependencies between network resources. This is a counterintuitive approach because it appears at first glance that deadlocks may form when allowing cyclic dependencies between network links or buffers. Only a complex mathematical proof can show that deadlock freedom can be guaranteed if certain conditions are met. This research was so disruptive when it was developed that it was rejected by several peers and considered to be incorrect, even by the most prominent researchers at that time. However, it was finally accepted and several well-known researchers developed their own version of this theory. The benefits from this disruptive approach are a dramatic reduction in the number of resources required to implement fully adaptive routing. This drastic reduction in the number of resources has led all the supercomputer designers who wanted to implement adaptive routing in their interconnect to select Duato?s technique as the most suitable and efficient one.
  • Dynamic network reconfiguration techniques for lossless networks. It was thought that dynamic network reconfiguration is not possible in a lossless network like the ones used in most high-performance clusters. The reason is that routing tables for the different routers or switches cannot be synchronously updated, and therefore, routing tables for the old and new network configurations may coexist, usually leading to deadlocks. As a consequence, all the commercial products (e.g. Myrinet) are based on static reconfiguration, thus leading to very significant performance losses every time there is a change in the topology. Again, we developed some disruptive research showing that, although routing tables cannot be asynchronously updated without introducing deadlocks, it is possible to asynchronously perform several rounds of partial routing table reconfigurations in such a way that deadlock could be avoided. Again, a complex theory was required to prove deadlock freedom. This research opened the door to new and much more powerful network reconfiguration strategies.
  • Network congestion management techniques that eliminate the negative effects of congestion instead of eliminating congestion. In order to use networks in a cost-effective manner, the working point of the network should be close to saturation, but performance degrades dramatically when entering saturation due to congestion trees growing very quickly, thus introducing head-of-line (HOL) blocking among packets. Congestion trees were identified more than two decades ago. Many solutions have been proposed but none of them is scalable with respect to neither link bandwidth nor network size. Again, we proposed a disruptive approach here. Instead of eliminating congestion, we just eliminated the negative effects produced by congestion. Our approach is to eliminate HOL blocking, thus allowing blocked packets leading to non-congested destinations to proceed. This is achieved in a scalable manner by implementing a small set (e.g. two to four) of additional queues at every switch input port, which are dynamically allocated to congested packet flows whenever congestion is detected. By doing so, blocked packets are moved to set aside queues (SAQs) and packets leading to non-congested destinations are able to proceed, effectively eliminating HOL blocking with a small number of resources. Moreover, as our congestion management scheme reacts immediately and locally, it does not introduce the performance degradation and instability problems that typically arise in traditional congestion management techniques.

Resume of scientific work and impact of work

The following paragraphs comment on the impact of the research developed by José Duato:

  • On his own, he developed the best adaptive routing techniques for interconnection networks, also formally proving through a necessary and sufficient condition that those routing techniques cannot be improved. This theory is very easy to apply because he also proposed simple design methodologies. Moreover, these algorithms require very few extra hardware resources to be implemented, thus making adaptive routing commercially viable. As a result, these adaptive routing techniques were used in experimental machines, such as the Reliable Router and the M-Machine (developed at MIT). Moreover, these techniques were used in the Cray T3E supercomputer (the fastest supercomputer at the time it was marketed in 1997) and in the on-chip router of the Compaq Alpha 21364, the fastest commercially available microprocessor when it was launched. These routing techniques have also been used in the Cray Black Widow and the IBM BlueGene/L, a 720 Teraflop massively parallel supercomputer with more than 130,000 dual-processor nodes, which is the fastest supercomputer today. The relevance of these results comes from the fact that adaptive routing based on the theory of José Duato drastically increases supercomputer performance at roughly no extra cost by allowing a much faster communication among processors, and supercomputers are instrumental in many fields. In particular, the BlueGene/L was conceived to accelerate research on protein folding.
  • His recent research aims at setting new standards for commercial interconnection networks. In particular, he developed, in collaboration with Xyratex (a UK company), a technique called Regional Explicit Congestion Notification (RECN), which is the only truly scalable congestion management technique for lossless networks to date. The importance of this result comes from the fact that it prevents the dramatic performance degradation experienced by communication networks when they reach saturation, thus allowing higher performance, better utilization, and hence, lower cost. This result has been protected with two joint patents, and RECN is currently being incorporated into the most important standard currently under development for future communication systems: Advanced Switching Interconnect. This standard extends the functionality of the popular PCI-Express, which is used in almost every computer today. Also, several members in his research group are working on improving InfiniBand, a recently proposed industry standard for communication between processors and input/output devices as well as interprocessor communication. The main results achieved by his research group up to now are a set of InfiniBand-compatible routing algorithms that significantly improve performance over previously proposed ones while being flexible enough to be defined on any topology, a set of mechanisms to extend the InfiniBand standard to support adaptive routing, a subnet manager protocol to implement network reconfiguration when the topology changes due to hot swapping/replacement of components, and a fast algorithm to compute InfiniBand arbitration tables that supports multiple classes of service. Several of these results are currently being considered by Sun Microsystems for their next-generation InfiniBand products. Also, some of these results are being ported to Advanced Switching Interconnect.
  • He structured the knowledge amassed over the years in the area of interconnection networks by presenting the fundamental concepts and state-of-the-art techniques in his book "Interconnection Networks: An Engineering Approach", published in the USA by IEEE Computer Society Press in 1997 and by Morgan Kaufmann in 2003. This book is currently used in the leading computer companies (IBM, Compaq, Intel, Sun Microsystems) by engineers who design interconnection networks. It is also used to teach PhD courses (especially in USA Universities). It is the most popular book on interconnection networks in the market today. Most recent research papers on interconnection networks reference this book. Additionally, due to his high international visibility, he has been invited to write a chapter on interconnection networks for the fourth edition of the book "Computer Architecture: A Quantitative Approach", by John Hennessy and Dave Patterson. This chapter is now complete and the book will be published by Morgan Kaufmann in the coming months. This is by far the most popular book on computer architecture, and almost the only one used for teaching this topic worldwide.
  • He opened new research lines in the area of interconnection networks. Examples of those lines are the design of adaptive routing algorithms with cyclic dependencies between resources, the use of scalable congestion management techniques to prevent performance degradation when the network reaches saturation, and the dynamic reconfiguration of the routing algorithm to support topology changes without stopping network traffic. The first one had a significant impact on industry, as mentioned above. The second line is likely to have a tremendous impact thanks to the joint patents with Xyratex and its inclusion in the Advanced Switching Interconnect standard. The third line has already raised significant interest in academia and industry (Sun Microsystems), and it led to filing a joint patent among three research institutions: Simula Research Laboratory (Norway), University of Southern California (USA) and Universidad Politécnica de Valencia.
  • He has contributed to the state-of-the-art in practically all the topics related to interconnection networks, including the proposal of new topologies, switching techniques, flow control techniques, deadlock detection and recovery techniques, congestion management, unicast and multicast routing algorithms, techniques to compute and enhance fault tolerance, network reconfiguration, scheduling algorithms for router resources, and router design, including support for multimedia traffic.
  • He promoted the creation of a large, multidisciplinary research team in Spain, coordinated by him. In just one decade, more than 50 researchers from five Spanish universities have joined his team. This team recently passed the first evaluation stage for the Consolider-Ingenio 2010 program. Taking into account that only 35 research teams passed this stage, it can be concluded that his research team is among the 35 best research teams in Spain across all the science areas.

Publications

  • Reaño, C., Silla, F. & Duato, J (2017). Enhancing the rCUDA Remote GPU Virtualization Framework: from a Prototype to a Production Solution. In Proceedings of the 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, CCGRID 2017, Madrid, Spain, May 14-17, 2017, pages 695-698. [More] 
  • Reaño, C., Silla, F., Castelló, A., Na, A. J., Mayo, R., Quintana-Ortí, E. S. et al. (2015). Improving the user experience of the rCUDA remote GPU virtualization framework. Concurrency and Computation: Practice and Experience, 27(14), 3746-3770. [More] 
  • Feliu, J., Petit, S., Sahuquillo, J. & Duato, J. (2014). Cache-hierarchy Contention Aware Scheduling in CMPs. IEEE Transactions on Parallel and Distributed Systems, 25(3), 581 - 590. [More] 
  • Peña, A. J., Reaño, C., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J. (2014). A complete and efficient CUDA-sharing solution for HPC clusters. Parallel Computing, 40(10), 574-588. [More] 
  • Reaño, C., Silla, F., Peña, A. J., Shainer, G., Schultz, S., Gimeno, A. C. et al (2014). Boosting the performance of remote GPU virtualization using InfiniBand connect-IB and PCIe 3.0. In 2014 IEEE International Conference on Cluster Computing, CLUSTER 2014, Madrid, Spain, September 22-26, 2014, pages 266-267. [More] 
  • Iserte, S., Gimeno, A. C., Mayo, R., Quintana-Ortí, E. S., Silla, F., Duato, J. et al (2014). SLURM Support for Remote GPU Virtualization: Implementation and Performance Study. In 26th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014, Paris, France, October 22-24, 2014, pages 318-325. [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2014). Addressing bandwidth contention in SMT multicores through scheduling. In International Conference on Supercomputing, ICS'14, pages 167. [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2013). Planificación Considerando Degradación de Prestaciones por Contención. In XXIV Jornadas de Paralelismo, JP 2013, Madrid, Sep 17-20, pages 62-67. [More] 
  • Reaño, C., Peña, A. J., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J (2013). Influence of InfiniBand FDR on the Performance of Remote GPU Virtualization. In International Conference on Cluster Computing (Cluster). [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2013). L1-Bandwidth Aware Thread Allocation in Multicore SMT Processors. In 22nd International Conference on Parallel Architectures and Compilation Techniques, PACT'13, Edinburgh, United Kingdom, Sep 7-11, pages 123-132. [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2013). Using huge pages and performance counters to determine the LLC architecture. In International Conference on Computational Science, ICCS'13, Barcelona, Jun 5-7, pages 2557-2560. [More] 
  • Reaño, C., Peña, A. J., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J (2012). CU2rCU: towards the Complete rCUDA Remote GPU Virtualization and Sharing Solution. In 19th Annual International Conference on High Performance Computing (HiPC). [More] 
  • Peñaranda, R., Gomez, C., Gomez, M. E., Lopez, P. & Duato, J. (2012). A New Family of Hybrid Topologies for Large-Scale Interconnection Networks. IEEE 11th International Symposium on Network Computing and Applications, 220-227. [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2012). Planificació considerando el ancho de banda de la jerarquía de cache. In XIII Jornadas de Paralelismo, JP 2012, Elche, Sep 19-21, pages 472-477. [More] 
  • Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2012). Understanding Cache Hierarchy Contention in CMPs to Improve Job Scheduling. In 26th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2012, Shanghai, China, May 21-25, pages 508-519. [More] 
  • Hernández, C., Roca, A., Silla, F., Flich, J. & Duato, J. (2012). On the Impact of Within-Die Process Variation in GALS-Based NoC Performance. IEEE Trans. on CAD of Integrated Circuits and Systems, 31(2), 294-307. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Orti, E. S (2011). Performance of CUDA Virtualized Remote GPUs in High Performance Clusters. In Parallel Processing (ICPP), 2011 International Conference on, pages 365 -374. [More] 
  • Hernández, C., Silla, F. & Duato, J (2011). Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process Variations. In Parallel Processing (ICPP), 2011 International Conference on, pages 41 -50. [More] 
  • Roca, A., Hernández, C., Flich, J., Silla, F. & Duato, J (2011). A Distributed Switch Architecture for On-Chip Networks. In Parallel Processing (ICPP), 2011 International Conference on, pages 21 -30. [More] 
  • Escudero-Sahuquillo, J., Gran, E. G., Garcia, P. J., Flich, J., Skeie, T., Lysne, O. et al (2011). Combining Congested-Flow Isolation and Injection Throttling in HPC Interconnection Networks. In Parallel Processing (ICPP), 2011 International Conference on, pages 662 -672. [More] 
  • Camacho Villanueva, J., Flich, J., Roca, A. & Duato, J (2011). PC-Mesh: A Dynamic Parallel Concentrated Mesh. In Parallel Processing (ICPP), 2011 International Conference on, pages 642 -651. [More] 
  • Cuesta Sáez, B., Ros, A., Gomez, M. E., Robles, A. & Duato, J (2011). Increasing the Effectiveness of Directory Caches by Deactivating Coherence for Private Memory Blocks. In 38th International Symposium on Computer Architecture (ISCA), pages 93-103. San Jose (California) : Association for Computing Machinery (ACM). [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al. (2011). Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 30(4), 534 -547. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Ort, E. S. (2011). Enabling CUDA acceleration within virtual machines using rCUDA. Proceedings of HiPC 2011. [More] 
  • Hernández, C., Roca, A., Flich, J., Silla, F. & Duato, J. (2011). Fault-Tolerant Vertical Link Design for Effective 3D Stacking. IEEE Computer Architecture Letters, 99(RapidPosts). [More] 
  • Sem-Jacobsen, F. O., Skeie, T., Lysne, O. & Duato, J. (2011). Dynamic Fault Tolerance in Fat Trees. IEEE Transactions on Computers, 60(4), 508 - 25. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J. (2011). How to reduce packet dropping in a bufferless NoC. Concurrency and Computation: Practice and Experience, 23(1), 86 - 99. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al (2011). Cost-efficient on-chip routing implementations for CMP and MPSoC systems. In, pages 534 - 547. 445 Hoes Lane / P.O. Box 1331, Piscataway, NJ 08855-1331, United States. [More] 
  • Hernández, C., Roca, A., Flich, J., Silla, F. & Duato, J. (2011). Characterizing the impact of process variation on 45 nm NoC-based CMPs. Journal of Parallel and Distributed Computing, 71(5), 651 - 663. [More] 
  • Escudero-Sahuquillo, J., Garcia, P. J., Quiles, F. J., Flich, J. & Duato, J. (2011). Cost-effective queue schemes for reducing head-of-line blocking in fat-trees. Concurrency Computation Practice and Experience, 12(15). [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al. (2011). Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(4), 534 - 47. [More] 
  • Camacho Villanueva, J., Flich, J., Duato, J., Eberle, H. & Olesinski, W (2011). A power-efficient network on-chip topology. In Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip, pages 23-26. New York, NY, USA : ACM. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J. (2011). How to reduce packet dropping in a bufferless NoC. Concurrency and Computation: Practice and Experience, 23(1), 86-99. [More] 
  • Camacho Villanueva, J., Flich, J., Duato, J., Eberle, H. & Olesinski, W (2011). Towards an Efficient NoC Topology through Multiple Injection Ports. In Digital System Design (DSD), 2011 14th Euromicro Conference on, pages 165 -172. [More] 
  • Hernández, C., Silla, F. & Duato, J (2011). Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process Variations. In ICPP, pages 41-50. [More] 
  • Sem-Jacobsen, F. O., Skeie, T., Lysne, O. & Duato, J. (2011). Dynamic fault tolerance in fat trees. IEEE Transactions on Computers, 60(4), 508 - 525. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J. (2011). How to reduce packet dropping in a bufferless NoC. Concurrency Computation Practice and Experience, 23(1), 86 - 99. [More] 
  • Serrano, M., Sahuquillo, J., Petit, S., Hassan, H. & Duato, J. (2011). A cost-effective heuristic to schedule local and remote memory in cluster computers. Journal of Supercomputing, 1 - 19. [More] 
  • Montaner, H., Silla, F., Froning, H. & Duato, J. (2011). A new degree of freedom for memory allocation in clusters. Cluster Computing, 1 - 23. [More] 
  • Escudero-Sahuquillo, J., Garcia, P. J., Quiles, F. J., Flich, J. & Duato, J (2010). Cost-Effective Congestion Management for Interconnection Networks Using Distributed Deterministic Routing. In 16th International Conference on Parallel and Distributed Systems (ICPADS 2010). Shanghai, China. [More] 
  • Roca, A., Flich, J., Silla, F. & Duato, J (2010). VCTlite: Towards an Efficient Implementation of Virtual Cut-Through Switching in On-Chip Networks. In 17th Int'l Conference on High Performance Computing (HiPC). Goa,India. [More] 
  • Ros, A., Cuesta Sáez, B., Fernández-Pascual, R., Gomez, M. E., Acacio, M. E., Robles, A. et al (2010). EMC^2: Extending Magny-Cours Coherence for Large-Scale Servers. In 17th Int'l Conference on High Performance Computing (HiPC). Goa, India. [More] 
  • Gilabert, F., Silla, F., Gomez, M. E., Lodde, M., Roca, A., Flich, J. et al. (2010). Designing Network On-Chip Architectures in the Nanoscale Era. CRC Press. [More] 
  • Serrano, M., Sahuquillo, J., Mohamed, H. H., Petit, S. & Duato, J (2010). A Scheduling Heuristic to Handle Local and Remote Memory in Cluster Computers. In High Performance Computing and Communications (HPCC), 2010 12th IEEE International Conference on, pages 35 -42. [More] 
  • Roca, A., Flich, J., Silla, F. & Duato, J (2010). A Latency-Efficient Router Architecture for CMP Systems. In Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on, pages 165 -172. [More] 
  • Montaner, H., Silla, F., Fröning, H. & Duato, J (2010). Getting Rid of Coherency Overhead for Memory-Hungry Applications. In Cluster Computing (CLUSTER), 2010 IEEE International Conference on, pages 48 -57. [More] 
  • Montaner, H., Silla, F. & Duato, J (2010). A practical way to extend shared memory support beyond a motherboard at low cost. In Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing, pages 155-166. Chicago, Illinois : ACM. [More] 
  • Nachiondo, T., Flich, J. & Duato, J. (2010). Buffer Management Strategies to Reduce HoL Blocking. Parallel and Distributed Systems, IEEE Transactions on, 21(6), 739 - 753. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al (2010). Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing. In Networks-on-Chip (NOCS), 2010 Fourth ACM/IEEE International Symposium on, pages 25 -32. [More] 
  • Hernández, C., Roca, A., Silla, F., Flich, J. & Duato, J (2010). Improving the Performance of GALS-Based NoCs in the Presence of Process Variation. In 2010 ACM/IEEE International Symposium on Networks-on-Chip (NOCS), pages 35 - 42. Grenoble, France : ACM. [More] 
  • Hernández, C., Silla, F. & Duato, J (2010). A Methodology for the Characterization of Process Variation in NoC Links. In 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pages 685-690. Dresden, Germany : EDDA. [More] 
  • Rayo, D. B., Sahuquillo, J., Mohamed, H. H., Petit, S. & Duato, J (2010). Balancing Task Resource Requirements in Embedded Multithreaded Multicore Processors to Reduce Power Consumption. In Proceedings of the 18th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2010), pages 200 - 4. [More] 
  • Alonso, M., Coll, S., Martínez, J. M., Santonja, V., Lopez, P. & Duato, J. (2010). Power saving in regular interconnection networks. Parallel Computing, 36(12), 696 - 712. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Ort, E. S (2010). rCUDA: Reducing the number of GPU-based accelerators in high performance clusters. In High Performance Computing and Simulation (HPCS), 2010 International Conference on, pages 224 - 231. Caen, France. [More] 
  • Duato, J., Igual, F. D., Mayo, R., Peña, A. J., Quintana-Orti, E. S. & Silla, F (2010). An efficient implementation of GPU virtualization in high performance clusters. In Euro-Par 2009 – Parallel Processing Workshops, pages 385 - 394. Delft, Netherlands. [More] 
  • Morillo, P., Rueda, S., Orduna, J. M. & Duato, J (2010). Ensuring the performance and scalability of peer-to-peer distributed virtual environments. In Future Generation Computer Systems, pages 905 - 915. P.O. Box 211, Amsterdam, 1000 AE, Netherlands. [More] 
  • Ferrer, J.-L., Baydal, E., Robles, A., Lopez, P. & Duato, J (2010). A Scalable and Early Congestion Management Mechanism for MINs. In Proceedings of the 18th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2010, pages 43 - 50. Piscataway, NJ, USA. [More] 
  • Fernandez-Pascual, R., Garcia, J. M., Acacio, M. E. & Duato, J. (2010). Dealing with transient faults in the interconnection network of CMPs at the cache coherence level. IEEE Transactions on Parallel and Distributed Systems, 21(8), 1117 - 1131. [More] 
  • Rodrigo, S., Hernández, C., Flich, J., Silla, F., Duato, J., Medardoni, S. et al (2009). Yield-oriented evaluation methodology of network-on-chip routing implementations. In System-on-Chip, 2009. SOC 2009. International Symposium on, pages 100 -105. [More] 
  • Rodrigo, S., Medardoni, S., Flich, J., Bertozzi, D. & Duato, J. (2009). Efficient implementation of distributed routing algorithms for NoCs. Computers Digital Techniques, IET, 3(5), 460 -475. [More] 
  • Petit, S., Ubal, R., Sahuquillo, J., Lopez, P. & Duato, J (2009). An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions. In Nunez, A. & Carballo, P. P. (editors), Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on, pages 635 -642. [More] 
  • Chirivella, V., Alcover, R., Flich, J. & Duato, J (2009). Dependability analysis of a fault-tolerant network reconfiguring strategy. In Sips, H., Epema, D. & Lin, H.-X. (editors), Euro-Par 2009 Parallel Processing, pages 1040 - 1051. Delft, Netherlands : Springer. [More] 
  • Mejia, A., Palesi, M., Flich, J., Kumar, S., Lopez, P., Holsmark, R. et al. (2009). Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 17(3), 356 -369. [More] 
  • Martinez, A., Garcia, P. J., Alfaro, F. J., Sanchez, J. L., Flich, J., Quiles, F. J. et al. (2009). A Switch Architecture Guaranteeing QoS Provision and HOL Blocking Elimination. Parallel and Distributed Systems, IEEE Transactions on, 20(1), 13 -24. [More] 
  • Hernández, C., Silla, F., Santonja, V. & Duato, J (2009). A new mechanism to deal with process variability in NoC links. In IPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium, pages IEEE Computer Societ. Rome, Italy. [More] 
  • Coll, S., Mora, F. J., Duato, J. & Petrini, F. (2009). Efficient and scalable hardware-based multicast in fat-tree networks. IEEE Transactions on Parallel and Distributed Systems, 20(9), 1285 - 1298. [More] 
  • Alfaro, F. J., Sanchez, J. L. & Duato, J. (2009). A new strategy to manage the InfiniBand arbitration tables. Journal of Parallel and Distributed Computing, 69(6), 508 - 520. [More] 
  • Morillo, P., Orduna, J. M. & Duato, J. (2009). M-GRASP: a GRASP with memory for latency-aware partitioning methods in DVE systems. IEEE Transactions on Systems, Man and Cybernetics, Part A (Systems and Humans), 39(6), 1214 - 23. [More] 
  • Camacho Villanueva, J., Flich, J., Duato, J., Eberle, H., Gura, N. & Olesinski, W (2009). A performance evaluation of 2D-mesh, ring, and crossbar interconnects for chip multi-processors. In Network on Chip Architectures, 2009. NoCArc 2009. 2nd International Workshop on, pages 51 -56. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2008). An Efficient Switching Technique for NoCs with Reduced Buffer Requirements. In Parallel and Distributed Systems, 2008. ICPADS '08. 14th IEEE International Conference on, pages 713 -720. [More] 
  • Gomez, C., Gilabert, F., Gomez, M. E., Lopez, P. & Duato, J. (2008). Beyond Fat--tree: Unidirectional Load--Balanced Multistage Interconnection Network. Computer Architecture Letters, 7(2), 49 -52. [More] 
  • Lysne, O., Montañana, J. M., Flich, J., Duato, J., Pinkston, T. M. & Skeie, T. (2008). An Efficient and Deadlock-Free Network Reconfiguration Protocol. Computers, IEEE Transactions on, 57(6), 762 -779. [More] 
  • Montañana, J. M., Flich, J. & Duato, J (2008). Epoch-based reconfiguration: Fast, simple, and effective dynamic network reconfiguration. In Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on, pages 1 -12. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2008). Exploiting Wiring Resources on Interconnection Network: Increasing Path Diversity. In Parallel, Distributed and Network-Based Processing, 2008. PDP 2008. 16th Euromicro Conference on, pages 20 -29. [More] 
  • Flich, J. & Duato, J. (2008). Logic-Based Distributed Routing for NoCs. Computer Architecture Letters, 7(1), 13 -16. [More] 
  • Gomez, C., Gilabert, F., Gomez, M. E., Lopez, P. & Duato, J (2008). RUFT: Simplifying the fat-tree topology. In Parallel and Distributed Systems, 2008. ICPADS '08. 14th IEEE International Conference on, pages 153 - 160. Melbourne, VIC, Australia. [More] 
  • Gilabert, F., Medardoni, S., Bertozzi, D., Benini, L., Gomez, M. E., Lopez, P. et al (2008). Exploring high-dimensional topologies for NoC design through an integrated analysis and synthesis framework. In, pages 107 - 16. Piscataway, NJ, USA. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2008). An efficient switching technique for NoCs with reduced buffer requirements. In Parallel and Distributed Systems, 2008. ICPADS '08. 14th IEEE International Conference on, pages 713 - 20. Piscataway, NJ, USA. [More] 
  • Montaner, H., Santonja, V., Silla, F. & Duato, J (2008). Network reconfiguration suitability for scientific applications. In Parallel Processing, 2008. ICPP '08. 37th International Conference on, pages 312 - 319. Piscataway, NJ, USA. [More] 
  • Cuesta Sáez, B., Robles, A. & Duato, J (2008). Improving token coherence by multicast coherence messages. In, pages 269 - 73. Piscataway, NJ, USA. [More] 
  • Ferrer, J.-L., Baydal, E., Robles, A., Lopez, P. & Duato, J (2008). On the influence of the packet marking and injection control schemes in congestion management for MINs. In, pages 930 - 9. Berlin, Germany. [More] 
  • Cuesta Sáez, B., Robles, A. & Duato, J (2008). Switch-based packing technique for improving token coherence scalability. In, pages 80 - 87. Dunedin, Otago, New zealand. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2008). Exploiting wiring resources on interconnection network: Increasing path diversity. In Parallel, Distributed and Network-Based Processing, 2008. PDP 2008. 16th Euromicro Conference on, pages 20 - 29. Toulouse, France. [More] 
  • Escudero-Sahuquillo, J., Garcia, P., Quiles, F., Flich, J. & Duato, J (2008). FBICM: Efficient congestion management for high-performance networks using distributed deterministic routing. In High Performance Computing - HiPC 2008, pages 503 - 517. Bangalore, India. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2008). Reducing packet dropping in a bufferless NoC. In Euro-Par 2008 – Parallel Processing, pages 899 - 909. Berlin, Germany. [More] 
  • Pakin, S., Stunkel, C., Flich, J., Alfaro, F., Almasi, G., Bilas, A. et al. (2008). Workshop 9 Introduction: The Workshop on Communication Architecture for Clusters - CAC 2008. IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM, IEEE Computer Societ. [More] 
  • Rodrigo, S., Flich, J., Duato, J. & Hummel, M (2008). Efficient unicast and multicast support for CMPs. In 2008 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41), pages 364 - 75. Piscataway, NJ, USA. [More] 
  • Flich, J., Rodrigo, S. & Duato, J (2008). An Efficient Implementation of Distributed Routing Algorithms for NoCs. In Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on, pages 87 -96. [More] 
  • Requena, C. G., Villamon, F. G., Gomez, M. E., Lopez, P. & Duato, J. (2008). Beyond fat - Tree: Unidirectional load - Balanced multistage interconnection network. IEEE Computer Architecture Letters, 7(2), 49 - 52. [More] 
  • Martinez, A., Apostolopoulos, G., Alfaro, F. J., Sanchez, J. L. & Duato, J. (2008). Efficient deadline-based QoS algorithms for high-performance networks. IEEE Transactions on Computers, 57(7), 928 - 939. [More] 
  • Fernandez-Pascual, R., Garcia, J. M., Acacio, M. E. & Duato, J (2008). Fault-tolerant cache coherence protocols for CMPs: Evaluation and trade-offs. In, pages 555 - 568. Bangalore, India. [More] 
  • Fernandez-Pascual, R., Garcia, J. M., Acacio, M. E. & Duato, J. (2008). Extending the tokenCMP cache coherence protocol for low overhead fault tolerance in CMP architectures. IEEE Transactions on Parallel and Distributed Systems, 19(8), 1044 - 1056. [More] 
  • Tornero, R., Ordua, J. M., Mejia, A., Flich, J. & Duato, J (2008). CART: Communication-Aware Routing Technique for Application-Specific NoCs. In Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on, pages 26 -31. [More] 
  • Eberle, H., Garcia, P. J., Flich, J., Duato, J., Drost, R., Gura, N. et al (2008). High-radix crossbar switches enabled by Proximity Communication. In High Performance Computing, Networking, Storage and Analysis, 2008. SC 2008. International Conference for, pages 1 -12. [More] 
  • Robles, A., Bermudez, A., Casado, R., Quiles, F. J., Skeie, T. & Duato, J. (2008). A proposal for managing ASI fabrics. Journal of Systems Architecture, 54(7), 664 - 678. [More] 
  • Tornero, R., Orduna, J. M., Palesi, M. & Duato, J (2008). A communication-aware topological mapping technique for NoCs. In, pages 910 - 919. Las Palmas de Gran Canaria, Spain. [More] 
  • Flich, J., Rodrigo, S., Duato, J., Sodring, T., Solheim, A. G., Skeie, T. et al (2008). On the Potential of NoC Virtualization for Multicore Chips. In Complex, Intelligent and Software Intensive Systems, 2008. CISIS 2008. International Conference on, pages 801 -807. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2008). Providing full QoS with 2 VCs in high-speed switches. In, pages 345 - 354. Estoril, Portugal. [More] 
  • Mejia, A., Flich, J. & Duato, J (2008). On the Potentials of Segment-Based Routing for NoCs. In Parallel Processing, 2008. ICPP '08. 37th International Conference on, pages 594 -603. [More] 
  • Fernandez-Pascual, R., Garcia, J. M., Acacio, M. E. & Duato, J (2008). A fault-tolerant directory-based cache coherence protocol for CMP architectures. In, pages 267 - 276. Anchorage, AK, United states. [More] 
  • Ubal, R., Sahuquillo, J., Petit, S., Lopez, P. & Duato, J (2007). VB-MT: Design Issues and Performance of the Validation Buffer Microarchitecture for Multithreaded Processors. In Parallel Architecture and Compilation Techniques, 2007. PACT 2007. 16th International Conference on, pages 429 -429. [More] 
  • Gomez, C., Gilabert, F., Gomez, M. E., Lopez, P. & Duato, J (2007). Deterministic versus Adaptive Routing in Fat-Trees. In Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International, pages 1 -8. [More] 
  • Gomez, C., Gilabert, F., Gomez, M. E., Lopez, P. & Duato, J (2007). Deterministic versus adaptive routing in fat-trees. In Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International, pages 8 pp. -. IEEE Computer Society. [More] 
  • Mejia, A., Flich, J., Duato, J., Reinemo, S.-A. & Skeie, T (2007). Boosting Ethernet Performance by Segment-Based Routing. In Parallel, Distributed and Network-Based Processing, 2007. PDP '07. 15th EUROMICRO International Conference on, pages 55 -62. [More] 
  • Alonso, M., Coll, S., Santonja, V., Martínez, J. M., Lopez, P. & Duato, J (2007). Power-aware fat-tree networks using on/off links. In Perrott, R, Chapman, BM, Subhlok, J et al (editors), HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, PROCEEDINGS, pages 472-483. [More] 
  • Martinez-Vicente, A., Garcia, P. J., Alfaro, F. J., Sanchez, J. L., Flich, J., Quiles, F. J. et al (2007). Integrated QoS provision and congestion management for interconnection networks. In Euro-Par 2007. Parallel Processing. Proceedings 13th International Euro-Par Conference., pages 837 - 47. Berlin, Germany. [More] 
  • Ferrer, J.-L., Baydal, E., Robles, A., Lopez, P. & Duato, J (2007). Congestion management in MINs through marked validated packets. In, pages 260 - 7. Piscataway, NJ, USA. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2007). Deadline-based QoS algorithms for high-performance networks. In, pages 9 pp. -. Piscataway, NJ, USA. [More] 
  • Fernandez-Pascual, R., Garcia, J. M., Acacio, M. E. & Duato, J (2007). A low overhead fault tolerant coherence protocol for CMP architectures. In, pages 157 - 168. Scottsdale, AZ, United states. [More] 
  • Alfaro, F. J., Sanchez, J. L., Menduina, M. & Duato, J. (2007). A} formal model to manage the InfiniBand arbitration tables providing Qo{S. IEEE Transactions on Computers, 56(8), 1024 - 1039. [More] 
  • Flich, J., Mejia, A., Lopez, P. & Duato, J (2007). Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips. In Networks-on-Chip, 2007. NOCS 2007. First International Symposium on, pages 183 -194. [More] 
  • Cuesta Sáez, B., Robles, A. & Duato, J (2007). Improving token coherence by Multicast Coherence Messages. In ElBaz, D, Bourgeois, J, Spies & F (editors), PROCEEDINGS OF THE 16TH EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, pages 269-273. [More] 
  • Morillo, P., Reuda, S., Orduna, J. M. & Duato, J. (2007). A latency-aware partitioning method for distributed virtual environment systems. IEEE Transactions on Parallel and Distributed Systems, 18(9), 1215 - 1226. [More] 
  • Rueda, S., Morillo, P., Orduna, J. M. & Duato, J. (2007). A genetic approach for adding QoS to distributed virtual environments. Computer Communications, 30(4), 731 - 739. [More] 
  • Kim, E. J., Yum, K. H., Das, C. R., Yousif, M. & Duato, J. (2007). Exploring IBA design space for improved performance. IEEE Transactions on Parallel and Distributed Systems, 18(4), 498 - 510. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2007). Efficient switches with QoS support for clusters. In, pages IEEE Computer Societ. Long Beach, CA, United states. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2007). Providing full QoS with 2 VCs in high-speed switches. In, pages 345 - 54. Berlin, Germany. [More] 
  • Mora, G., Garcia, P. J., Flich, J. & Duato, J (2007). RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management. In Parallel Processing, 2007. ICPP 2007. International Conference on, pages 74 -74. [More] 
  • Bermudez, A., Casado, R., Quiles, F. J. & Duato, J. (2007). Handling topology changes in InfiniBand. IEEE Transactions on Parallel and Distributed Systems, 18(2), 172 - 185. [More] 
  • Garcia, P. J., Flich, J., Duato, J., Johnson, I., Quiles, F. J. & Naven, F. (2007). Decongestants for clogged networks. IEEE Potentials, 26(6), 36 - 41. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L., Quiles, F. J. & Duato, J. (2007). A new cost-effective technique for QoS support in clusters. IEEE Transactions on Parallel and Distributed Systems, 18(12), 1714 - 1726. [More] 
  • Rueda, S., Morillo, P., Orduna, J. M. & Duato, J (2007). On the characterization of peer-to-peer distributed virtual environments. In, pages 107 - 114. Charlotte, NC, United states. [More] 
  • Gomez, C., Gomez, M. E., Lopez, P. & Duato, J (2007). An efficient fault-tolerant routing methodology for fat-tree interconnection networks*. In, pages 509 - 22. Berlin, Germany. [More] 
  • Cuesta Sáez, B., Robles, A. & Duato, J (2007). An effective starvation avoidance mechanism to enhance the token coherence protocol. In DAmbra, P, Guarracino & MR (editors), 15th EUROMICRO International Conference on Parallel, Distributed and Network-Based Processing, Proceedings, pages 47-54. [More] 
  • Garcia, P. J., Quiles, F. J., Flich, J., Duato, J., Johnson, I. & Naven, F. (2006). Efficient, Scalable Congestion Management for Interconnection Networks. Micro, IEEE, 26(5), 52 -66. [More] 
  • Gomez, M. E., Nordbotten, N. A., Flich, J., Lopez, P., Robles, A., Duato, J. et al. (2006). A routing methodology for achieving fault tolerance in direct networks. Computers, IEEE Transactions on, 55(4), 400 - 415. [More] 
  • Alonso, M., Coll, S., Martínez, J. M., Santonja, V., Lopez, P. & Duato, J (2006). Dynamic power saving in fat-tree interconnection networks using on/off links. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International, pages 8 pp.. [More] 
  • Mejia, A., Flich, J., Duato, J., Reinemo, S. -. & Skeie, T (2006). Segment-based routing: an efficient fault-tolerant routing algorithm for meshes and tori. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International, pages 10 pp.. [More] 
  • Alonso, M., Coll, S., Martínez, J. M., Santonja, V., Lopez, P. & Duato, J (2006). Dynamic power saving in fat-tree interconnection networks using on/off links. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International, pages 8 pp. -. IEEE Computer Society. [More] 
  • Mora, G., Flich, J., Duato, J., Lopez, P., Baydal, E. & Lysne, O (2006). Towards an efficient switch architecture for high-radix switches. In, pages 11 - 20. Piscataway, NJ, USA. [More] 
  • Nachiondo, T., Flich, J. & Duato, J (2006). Destination-based HoL blocking elimination. In Parallel and Distributed Systems, 2006. ICPADS 2006. 12th International Conference onParallel and Distributed Systems, 2006. ICPADS 2006. 12th International Conference on, pages 10 pp. -. [More] 
  • Gomez, M. E., Lopez, P. & Duato, J. (2006). FIR: An efficient routing strategy for tori and meshes. Journal of Parallel and Distributed Computing, 66(7), 907 - 21. [More] 
  • Gilabert, F., Gomez, M. E., Lopez, P. & Duato, J (2006). On the influence of the selection function on the performance of fat-trees. In, pages 864 - 73. Berlin, Germany. [More] 
  • Gomez, M. E., Nordbotten, N. A., Flich, J., Lopez, P., Robles, A., Duato, J. et al. (2006). A routing methodology for achieving fault tolerance in direct networks. IEEE Transactions on Computers, 55(4), 400 - 15. [More] 
  • Mejia, A., Flich, J., Duato, J., Reinemo, S. -. & Skeie, T (2006). Segment-based routing: an efficient fault-tolerant routing algorithm for meshes and tori. In Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International, pages 10 pp. -. Piscataway, NJ, USA. [More] 
  • Montañana, J. M., Flich, J., Robles, A. & Duato, J (2006). Reachability-based fault-tolerant routing. In Parallel and Distributed Systems, 2006. ICPADS 2006. 12th International Conference on, pages 10 pp.. [More] 
  • Garcia, P. J., Quiles, F. J., Flich, J., Duato, J. & Johnson, I (2006). RECN-DD: A Memory-Efficient Congestion Management Technique for Advanced Switching. In Parallel Processing, 2006. ICPP 2006. International Conference on, pages 23 -32. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). Full QoS support with 2 VCs for single-chip switches. In, pages 4 pp. -. Los Alamitos, CA, USA. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). Full QoS support with 2 VCs for single-chip switches. In, pages 239 - 242. Cambridge, MA, United states. [More] 
  • Martinez, A., Apostolopoulos, G., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). QoS support for video transmission in high-speed interconnects. In, pages 631 - 641. Munich, Germany. [More] 
  • Sem-Jacobsen, F. O., Skeie, T., Lysne, O. & Duato, J (2006). Dynamic fault tolerance with misrouting in fat trees. In, pages 33 - 42. Columbus, OH, United states. [More] 
  • Morillo, P., Moncho, W., Orduria, J. M. & Duato, J (2006). Providing full awareness to distributed virtual environments based on peer-to-peer architectures. In, pages 336 - 47. Berlin, Germany. [More] 
  • Morillo, P., Moncho, W., Orduna, J. M. & Duato, J (2006). Providing full awareness to distributed virtual environments based on peer-to-peer architectures. In, pages 336 - 347. Hangzhou, China. [More] 
  • Morillo, P., Ordufia, J. M. & Duato, J (2006). A scalable synchronization technique for distributed virtual environments based on networked-server architectures. In, pages 8 pp. -. Los Alamitos, CA, USA. [More] 
  • Bermudez, A., Casado, R., Quiles, F. J. & Duato, J. (2006). Fast routing computation on InfiniBand networks. IEEE Transactions on Parallel and Distributed Systems, 17(3), 215 - 226. [More] 
  • Morillo, P., Orduna, J. M. & Duato, J (2006). A scalable synchronization technique for distributed virtual environments based on networked-server architectures. In, pages 74 - 81. Columbus, OH, United states. [More] 
  • Martinez, A., Apostolopoulos, G., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). QoS support for video transmission in high-speed interconnects. In, pages 631 - 41. Berlin, Germany. [More] 
  • Sem-Jacobsen, F. O., Skeie, T., Lysne, O. & Duato, J (2006). Dynamic fault tolerance with misrouting in fat trees. In, pages 10 pp. -. Los Alamitos, CA, USA. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). Scalable low-cost QoS support for single-chip switches. In, pages 439 - 446. Minneapolis, MN, United states. [More] 
  • Caminero, B., Carrion, C., Quiles, F. J., Duato, J. & Yalamanchili, S. (2006). MMR: A MultiMedia Router architecture to support hybrid workloads. Journal of Parallel and Distributed Computing, 66(2), 307 - 321. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2006). Scalable low-cost QoS support for single-chip switches. In, pages 8 pp. -. Los Alamitos, CA, USA. [More] 
  • Martinez, A., Garcia, P. J., Alfaro, F. J., Sanchez, J. L., Flich, J., Quiles, F. J. et al (2006). Towards a cost-effective interconnection network architecture with QoS and congestion management support. In, pages 884 - 95. Berlin, Germany. [More] 
  • Baydal, E., Lopez, P. & Duato, J. (2005). A family of mechanisms for congestion control in wormhole networks. Parallel and Distributed Systems, IEEE Transactions on, 16(9), 772 - 784. [More] 
  • Nachiondo, T., Flich, J., Duato, J. & Gusat, M (2005). Cost/performance trade-offs and fairness evaluation of queue mapping policies. In Cunha, J. C. & Medeiros, P. D. (editors), Euro-Par 2005 Parallel Processing, pages 1024 - 1034. [More] 
  • Gomez, M. E., Lopez, P. & Duato, J (2005). A Memory-Effective Fault-Tolerant Routing Strategy for Direct Interconnection Networks. In Parallel and Distributed Computing, 2005. ISPDC 2005. The 4th International Symposium on, pages 341 -348. [More] 
  • Gomez, M. E., Lopez, P. & Duato, J (2005). A Memory-Effective Routing Strategy for Regular Interconnection Networks. In Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International, pages 41b - 41b. [More] 
  • Alonso, M., Martínez, J. M., Santonja, V., Lopez, P. & Duato, J (2005). Power Saving in Regular Interconnection Networks Built with High-Degree Switches. In Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International, pages 5b - 5b. [More] 
  • Nachiondo, T., Flich, J. & Duato, J (2005). Efficient reduction of HOL blocking in multistage networks. In Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International, pages 8 pp.. [More] 
  • Duato, J., Johnson, I., Flich, J., Naven, F., Garcia, P. & Nachiondo, T (2005). A new scalable and cost-effective congestion management strategy for lossless multistage interconnection networks. In High-Performance Computer Architecture, 2005. HPCA-11. 11th International Symposium on, pages 108 - 119. [More] 
  • Baydal, E., Lopez, P. & Duato, J. (2005). A family of mechanisms for congestion control in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 16(9), 772 - 84. [More] 
  • Koibuchi, M., Martinez, J. C., Flich, J., Robles, A., Lopez, P. & Duato, J. (2005). Enforcing in-order packet delivery in system area networks with adaptive routing. Journal of Parallel and Distributed Computing, 65(10), 1223 - 1236. [More] 
  • Alonso, M., Martínez, J. M., Santonja, V., Lopez, P. & Duato, J (2005). Power saving in regular interconnection networks built with high-degree switches. In, pages 10 pp. -. Los Alamitos, CA, USA. [More] 
  • Gomez, M. E., Lopez, P. & Duato, J (2005). A memory-effective routing strategy for regular interconnection networks. In, pages 41 -. Denver, CO, United states. [More] 
  • Gomez, M. E., Lopez, P. & Duato, J (2005). A memory-effective fault-tolerant routing strategy for direct interconnection networks. In, pages 341 - 8. Los Alamitos, CA, USA. [More] 
  • Caminero, B., Carrion, C., Quiles, F. J., Duato, J. & Yalamanchili, S. (2005). Traffic scheduling solutions with QoS support for an input-buffered multimedia router. IEEE Transactions on Parallel and Distributed Systems, 16(11), 1009 - 1021. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2005). Providing full QoS support in clusters using only two VCs at the switches. In, pages 158 - 69. Berlin, Germany. [More] 
  • Duato, J., Lysne, O., Pang, R. & Pinkston, T. M. (2005). A} theory for deadlock-free dynamic network reconfiguration. Part {I. IEEE Transactions on Parallel and Distributed Systems, 16(5), 412 - 27. [More] 
  • Rueda, S., Morillo, P., Orduna, J. M. & Duato, J (2005). A sexual elitist genetic algorithm for providing QoS in distributed virtual environment systems. In, pages 8 pp. -. Los Alamitos, CA, USA. [More] 
  • Duato, J., Lysne, O., Pang, R. & Pinkston, T. M. (2005). Part I: A theory for deadlock-free dynamic network reconfiguration. IEEE Transactions on Parallel and Distributed Systems, 16(5), 412 - 427. [More] 
  • Lysne, O., Pinkston, T. M. & Duato, J. (2005). Part II: A methodology for developing deadlock-free dynamic network reconfiguration processes. IEEE Transactions on Parallel and Distributed Systems, 16(5), 428 - 443. [More] 
  • Rueda, S., Morillo, P., Orduna, J. M. & Duato, J (2005). A sexual elitist genetic algorithm for providing QoS in distributed virtual environment systems. In, pages IEEE Computer Societ. Denver, CO, United states. [More] 
  • Morillo, P., Orduna, J. M., Fernandez, M. & Duato, J (2005). A method for providing QoS in distributed virtual environments. In, pages 152 - 9. Los Alamitos, CA, USA. [More] 
  • Morillo, P., Orduna, J. M., Fernandez, M. & Duato, J. (2005). Improving the performance of distributed virtual environment systems. IEEE Transactions on Parallel and Distributed Systems, 16(7), 637 - 649. [More] 
  • Alfaro, F. J., Sanchez, J. L. & Duato, J (2005). S}tudying the influence of the InfiniBand packet size to guarantee Qo{S. In, pages 989 - 994. Murcia, Spain. [More] 
  • Alfaro, F. J., Sanchez, J. L. & Duato, J (2005). S}tudying the influence of the InfiniBand packet size to guarantee Qo{S. In, pages 989 - 94. Los Alamitos, CA, USA. [More] 
  • Garcia, P. J., Flich, J., Duato, J., Johnson, I., Quiles, F. J. & Naven, F (2005). Dynamic evolution of congestion trees: Analysis and impact on switch architecture. In, pages 266 - 285. Barcelona, Spain. [More] 
  • Feng, W.-C. & Duato, J. (2005). Message from the program co-chairs. Proceedings of the International Conference on Parallel Processing, 2005, xii - xii. [More] 
  • Martinez, A., Alfaro, F. J., Sanchez, J. L. & Duato, J (2005). Providing full QoS support in clusters using only two VCs at the switches. In, pages 158 - 169. Goa, India. [More] 
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  • Bernabe, G., Gonzalez, J., Garcia, J. M. & Duato, J (2000). A new lossy 3-D wavelet transform for high-quality compression of medical video. In, pages 226 - 31. Piscataway, NJ, USA. [More] 
  • Love, D., Yalamanchili, S., Duato, J., Caminero, M. B. & Quiles, F. J. (2000). Switch scheduling in the Multimedia Router (MMR). Proceedings of the International Parallel Processing Symposium, IPPS, 5 - 11. [More] 
  • Bermudez, A., Alfaro, F. J., Casado, R., Duato, J., Quiles, F. J. & Sanchez, J. L (2000). Extending dynamic reconfiguration to NOWs with adaptive routing. In, pages 73 - 83. Berlin, Germany. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Performance analysis of storage area networks using high-speed LAN interconnects. In, pages 474 - 8. Los Alamitos, CA, USA. [More] 
  • Flich, J., Malumbres, M. P., Lopez, P. & Duato, J (2000). Performance evaluation of a new routing strategy for irregular networks with source routing. In, pages 34 - 43. New York, NY, USA. [More] 
  • Lysne, O. & Duato, J (2000). Fast dynamic reconfiguration in irregular networks. In, pages 449 - 58. Los Alamitos, CA, USA. [More] 
  • Buntinas, D., Panda, D. K., Duato, J. & Sadayappan, P (2000). Broadcast/multicast over Myrinet using NIC-assisted multidestination messages. In, pages 115 - 29. Berlin, Germany. [More] 
  • Alfaro, F. J., Bermudez, A., Casado, R., Duato, J., Quiles, F. J. & Sanchez, J. L (2000). On the performance of up*/down* routing. In, pages 61 - 72. Berlin, Germany. [More] 
  • Yarmolenko, V., Duato, J., Panda, D. K. & Sadayappan, P (2000). Characterization and enhancement of dynamic mapping heuristics for heterogeneous systems. In, pages 437 - 44. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M., Arnau, V. & Duato, J (2000). Characterization of communications between processes in message-passing applications. In, pages 91 - 8. Los Alamitos, CA, USA. [More] 
  • Silla, F. & Duato, J. (2000). High-performance routing in networks of workstations with irregular topology. IEEE Transactions on Parallel and Distributed Systems, 11(7), 699 - 719. [More] 
  • Flich, J., Lopez, P., Malumbres, M. P., Duato, J. & Rokicki, T (2000). Combining in-transit buffers with optimized routing schemes to boost the performance of networks with source routing. In, pages 300 - 9. Berlin, Germany. [More] 
  • Flich, J., Lopez, P., Malumbres, M. P. & Duato, J (2000). Improving the performance of regular networks with source routing. In, pages 353 - 61. Los Alamitos, CA, USA. [More] 
  • Flich, J., Malumbres, M. P., Lopez, P. & Duato, J (2000). Improving routing performance in Myrinet networks. In, pages 27 - 32. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Performance sensitivity of routing algorithms to failures in networks of workstations. In, pages 230 - 42. Berlin, Germany. [More] 
  • Casado, R., Bermudez, A., Quiles, F. J., Sanchez, J. L. & Duato, J (2000). Performance evaluation of dynamic reconfiguration in high-speed local area networks. In, pages 85 - 96. Toulouse, France. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Modeling and simulation of storage area networks. In, pages 307 - 14. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). On the effect of link failures in fibre channel storage area networks. In, pages 102 - 11. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M., Arnau, V., Ruiz, A., Valero, R. & Duato, J (2000). On the design of communication-aware task scheduling strategies for heterogeneous systems. In, pages 391 - 8. Los Alamitos, CA, USA. [More] 
  • Holenarsipur, P., Yarmolenko, V., Duato, J., Panda, D. K. & Sadayappan, P (2000). Characterization and enhancement of static mapping heuristics for heterogeneous systems. In, pages 37 - 48. Berlin, Germany. [More] 
  • Lopez, P., Alcover, R., Duato, J. & Zunica, L (1999). Optimizing network throughput: optimal versus robust design. In Parallel and Distributed Processing, 1999. PDP '99. Proceedings of the Seventh Euromicro Workshop on, pages 45 -52. [More] 
  • Casado, R., Bermudez, A., Quiles, F. J., Sanchez, J. L. & Duato, J (1999). Performance evaluation of dynamic reconfiguration in high-speed local area networks. In, pages 85 - 96. Toulouse, France. [More] 
  • Duato, J., Robles, A., Silla, F. & Beivide, R. (1999). Comparison of router architectures for virtual cut-through and wormhole switching in a NOW environment. Proceedings of the International Parallel Processing Symposium, IPPS, 240 - 247. [More] 
  • Casado, R., Bermudez, A., Quiles, F. J., Sanchez, J. L. & Duato, J (1999). Performance evaluation of dynamic reconfiguration in high-speed local area networks. In, pages 85 - 96. Los Alamitos, CA, USA. [More] 
  • Martinez, J. F., Torrellas, J. & Duato, J (1999). Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity. In, pages 202 - 9. New York, NY, USA. [More] 
  • Caminero, B., Quiles, F. J., Duato, J., Love, D. S. & Yalamanchili, S (1999). Performance evaluation of the multimedia router with MPEG-2 video traffic. In, pages 62 - 76. Berlin, Germany. [More] 
  • Flich, J., Malumbres, M. P., Lopez, P. & Duato, J (1999). Performance evaluation of networks of workstations with hardware shared memory model using execution-driven simulation. In Parallel Processing, 1999. Proceedings. 1999 International Conference on, pages 146 -153. [More] 
  • Casado, R., Quiles, F. J., Sanchez, J. L. & Duato, J (1999). Deadlock-free routing in irregular networks with dynamic reconfiguration. In, pages 165 - 80. Berlin, Germany. [More] 
  • Duato, J., Robles, A., Silla, F. & Beivide, R (1999). A comparison of router architectures for virtual cut-through and wormhole switching in a NOW environment. In, pages 240 - 7. Los Alamitos, CA, USA. [More] 
  • Dao, B. V., Duato, J. & Yalamanchili, S. (1999). Dynamically configurable message flow control for fault-tolerant routing. IEEE Transactions on Parallel and Distributed Systems, 10(1), 7 - 22. [More] 
  • Martinez, J. M., Lopez, P. & Duato, J (1999). Impact of buffer size on the efficiency of deadlock detection. In, pages 315 - 18. Los Alamitos, CA, USA. [More] 
  • Lopez, P., Alcover, R., Duato, J. & Zunica, L (1999). Optimizing network throughput: optimal versus robust design. In, pages 45 - 52. Los Alamitos, CA, USA. [More] 
  • Duato, J., Yalamanchili, S., Caminero, M. B., Love, D. & Quiles, F. J (1999). MMR: A high-performance multimedia router - architecture and design trade-offs. In, pages 300 - 309. Orlando, FL, USA. [More] 
  • Duato, J., Yalamanchili, S., Caminero, M. B., Love, D. & Quiles, F. J (1999). MMR: a high-performance MultiMedia Router-architecture and design trade-offs. In, pages 300 - 9. Los Alamitos, CA, USA. [More] 
  • Puente, V., Beivide, R., Gregorio, J. A., Prellezo, J. M., Duato, J. & Izu, C (1999). Adaptive bubble router: a design to improve performance in torus networks. In, pages 58 - 67. Los Alamitos, CA, USA. [More] 
  • Silla, F. & Duato, J (1999). Is it worth the flexibility provided by irregular topologies in networks of workstations?. In, pages 47 - 61. Berlin, Germany. [More] 
  • Lopez, P., Martínez, J. M. & Duato, J (1998). DRIL: dynamically reduced message injection limitation mechanism for wormhole networks. In Parallel Processing, 1998. Proceedings. 1998 International Conference on, pages 535 -542. [More] 
  • Lopez, P., Martinez, J. M. & Duato, J (1998). A very efficient distributed deadlock detection mechanism for wormhole networks. In, pages 57 - 66. Los Alamitos, CA, USA. [More] 
  • Lopez, P., Martínez, J. M. & Duato, J (1998). Very efficient distributed deadlock detection mechanism for wormhole networks. In, pages 57 - 66. Las Vegas, NV, USA. [More] 
  • Sanchez, J. L., Duato, J. & Garcia, J. M (1998). Using channel pipelining in reconfigurable interconnection networks. In, pages 120 - 6. Los Alamitos, CA, USA. [More] 
  • Garcia, R. & Duato, J. (1998). Suboptimal-optimal routing for LAN internetworking using transparent bridges. International Journal of Foundations of Computer Science, 9(2), 139 - 56. [More] 
  • Silla, F. & Duato, J (1998). On the use of virtual channels in networks of workstations with irregular topology. In, pages 203 - 16. Berlin, Germany. [More] 
  • Silla, F., Malumbres, M. P., Duato, J., Dai, D. & Panda, D. K (1998). Impact of adaptivity on the behavior of networks of workstations under bursty traffic. In, pages 88 - 95. Los Alamitos, CA, USA. [More] 
  • Silla, F., Duato, J., Sivasubramaniam, A. & Das, C. R (1998). Virtual channel multiplexing in networks of workstations with irregular topology. In, pages 147 - 54. Los Alamitos, CA, USA. [More] 
  • Lopez, P., Alcover, R., Duato, J. & Zunica, L. (1998). Cost-effective methodology for the evaluation of interconnection networks. Journal of Systems Architecture, 44(9-10), 815 - 830. [More] 
  • Lopez, P., Martinez, J. M. & Duato, J (1998). DRIL: dynamically reduced message injection limitation mechanism for wormhole networks. In, pages 535 - 42. Los Alamitos, CA, USA. [More] 
  • Silla, F., Robles, A. & Duato, J (1998). Improving performance of networks of workstations by using Disha Concurrent. In, pages 80 - 7. Los Alamitos, CA, USA. [More] 
  • Flich, J., Lopez, P., Malumbres, M. P. & Duato, J (1998). Edinet: an execution driven interconnection network simulator for DSM systems. In, pages 336 - 9. Berlin, Germany. [More] 
  • Silla, F., Robles, A. & Duato, J (1998). Improving performance of networks of workstations by using Disha Concurrent. In Lai & TH (editors), 1998 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING - PROCEEDINGS, pages 80-87. [More] 
  • Lopez, P., Martinez, J. M., Duato, J. & Petrini, F (1998). On the reduction of deadlock frequency by limiting message injection in wormhole networks. In, pages 295 - 307. Berlin, Germany. [More] 
  • Garcia, R., Duato, J. & Serrano, J. J (1998). A new transparent bridge protocol for LAN internetworking using topologies with active loops. In, pages 295 - 303. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M. & Duato, J (1998). On the design of network routers for multimedia applications. In, pages 13 - 20. Los Alamitos, CA, USA. [More] 
  • Casado, R., Caminero, B., Cuenca, P., Quiles, F., Garrido, A. & Duato, J (1998). A tool for the analysis of reconfiguration and routing algorithms in irregular networks. In, pages 159 - 73. Berlin, Germany. [More] 
  • Duato, J (1998). Deadlock avoidance and adaptive routing in interconnection networks. In, pages 359 - 64. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M. & Duato, J (1998). A high performance router architecture for multimedia applications. In, pages 142 - 9. Los Alamitos, CA, USA. [More] 
  • Martínez, J. M., Lopez, P., Duato, J. & Pinkston, T. M (1997). Software-based deadlock recovery technique for true fully adaptive routing in wormhole networks. In Parallel Processing, 1997., Proceedings of the 1997 International Conference on, pages 182 -189. [More] 
  • Duato, J., Lopez, P. & Yalamanchili, S (1997). Deadlock- and livelock-free routing protocols for wave switching. In Parallel Processing Symposium, 1997. Proceedings., 11th International, pages 570 -577. [More] 
  • Petrini, F., Duato, J., Lopez, P. & Martínez, J. M (1997). LIFE: A Limited Injection, Fully adaptivE, recovery-based routing algorithm. In, pages 316 - 321. Bangalore, India. [More] 
  • Olivares, T., Cuenca, P., Quiles, F. J., Garrido, A., Sanchez, J. L. & Duato, J (1997). Interconnection network behavior on a multicomputer in the parallelization of the MPEG coding algorithm. Worm-hole vs Packet-Switching Routing. In, pages 48 - 53. Bangalore, India. [More] 
  • Silla, F. & Duato, J (1997). Improving the efficiency of adaptive routing in networks with irregular topology. In, pages 330 - 335. Bangalore, India. [More] 
  • Dao, B. V., Yalamanchili, S. & Duato, J (1997). Architectural support for reducing communication overhead in multiprocessor interconnection networks. In, pages 343 - 52. Los Alamitos, CA, USA. [More] 
  • Duato, J. (1997). Theory of fault-tolerant routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 8(8), 790 - 802. [More] 
  • Olivares, T., Cuenca, P., Quiles, F. J., Garrido, A., Sanchez, J. L. & Duato, J (1997). Interconnection network behavior on a multicomputer in the parallelization of the MPEG coding algorithm. Worm-hole vs. packet-switching routing. In, pages 48 - 53. Los Alamitos, CA, USA. [More] 
  • Duato, J (1997). Switching techniques, adaptive routing and deadlock handling in interconnection networks. In, pages 88 -. Montreal, Can. [More] 
  • Silla, F. & Duato, J (1997). Tuning the number of virtual channels in networks of workstations. In, pages 72 - 5. Raleigh, NC, USA. [More] 
  • Martinez, J. M., Lopez, P., Duato, J. & Pinkston, T. M (1997). Software-based deadlock recovery technique for true fully adaptive routing in wormhole networks. In, pages 182 - 9. Los Alamitos, CA, USA. [More] 
  • Dao, B. V., Yalamanchili, S. & Duato, J (1997). Architectural support for reducing communication overhead in multiprocessor interconnection networks. In, pages 343 - 352. San Antonio, TX, USA. [More] 
  • Duato, J., Lopez, P. & Yalamanchili, S (1997). Deadlock- and livelock-free routing protocols for wave switching. In, pages 570 - 7. Los Alamitos, CA, USA. [More] 
  • Silla, F. & Duato, J (1997). Improving the efficiency of adaptive routing in networks with irregular topology. In, pages 330 - 5. Los Alamitos, CA, USA. [More] 
  • Alcover, R., Lopez, P., Duato, J. & Zunica, L (1997). A methodology for optimal interconnection network design. In, pages 81 - 4. Raleigh, NC, USA. [More] 
  • Alcover, R., Lopez, P., Duato, J. & Zunica, L (1996). Interconnection network design: a statistical analysis of interactions between factors. In Parallel and Distributed Processing, 1996. PDP '96. Proceedings of the Fourth Euromicro Workshop on, pages 211 -218. [More] 
  • Alcover, R., Lopez, P., Duato, J. & Zunica, L (1996). Interconnection network design: a statistical analysis of interactions between factors. In, pages 211 - 18. Los Alamitos, CA, USA. [More] 
  • Duato, J. & Malumbres, M. P (1996). Optimal topology for distributed shared-memory multiprocessors: hypercubes again?. In, pages 205 - 12. Berlin, Germany. [More] 
  • V., A. K., Pinkston, T. M. & Duato, J (1996). Generalized theory for deadlock-free adaptive wormhole routing and its application to Disha concurrent. In, pages 815 - 821. Honolulu, HI, USA. [More] 
  • Venkatramani, A. K., Pinkston, T. M. & Duato, J (1996). Generalized theory for deadlock-free adaptive wormhole routing and its application to Disha Concurrent. In, pages 815 - 21. Los Alamitos, CA, USA. [More] 
  • Duato, J. (1996). Necessary and sufficient condition for deadlock-free routing in cut-through and store-and-forward networks. IEEE Transactions on Parallel and Distributed Systems, 7(8), 841 - 854. [More] 
  • Duato, J. & Malumbres, M. P. (1996). Optimal topology for distributed shared memory multiprocessors: Hypercubes again?. Lecture Notes in Computer Science, 1123, 205 - 205. [More] 
  • Malumbres, M. P., Duato, J. & Torrellas, J (1996). Efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors. In, pages 186 - 189. New Orleans, LA, USA. [More] 
  • Duato, J., Lopez, P., Silla, F. & Yalamanchili, S (1996). A high performance router architecture for interconnection networks. In, pages 61 - 8. Los Alamitos, CA, USA. [More] 
  • Malumbres, M. P., Duato, J. & Torrellas, J (1996). An efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors. In, pages 186 - 9. Los Alamitos, CA, USA. [More] 
  • Dao, B. V., Duato, J. & Yalamanchili, S (1995). Configurable flow control mechanisms for fault-tolerant routing. In, pages 220 - 229. Santa Margherita Ligure, Italy. [More] 
  • Duato, J. (1995). Theory of deadlock-free adaptive multicast routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 6(9), 976 - 987. [More] 
  • Dao, B. V., Duato, J. & Yalamanchili, S (1995). Configurable flow control mechanisms for fault-tolerant routing. In, pages 220 - 229. Santa Margherita Ligure, Italy. [More] 
  • Duato, J. (1995). Necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 6(10), 1055 - 1067. [More] 
  • Dao, B. V., Duato, J. & Yalamanchili, S (1995). Configurable flow control mechanisms for fault-tolerant routing. In, pages 220 - 9. New York, NY, USA. [More] 
  • Lopez, P. & Duato, J. (1995). Deadlock-free fully-adaptive minimal routing algorithms: limitations and solutions. Computers and Artificial Intelligence, 14(2), 105 - 25. [More] 
  • Duato, J. & Lopez, P (1995). Highly adaptive wormhole routing algorithms for n-dimensional torus. In, pages 87 - 104. New York, NY, USA. [More] 
  • Duato, J. (1994). A theory to increase the effective redundancy in wormhole networks. Parallel Processing Letters, 4(1-2), 125 - 38. [More] 
  • Duato, J. & Lopez, P (1994). Performance evaluation of adaptive routing algorithms for k-ary n-cubes, pages 45 - 45. Seattle, WA, United states. [More] 
  • Liu, Z. & Duato, J (1994). Adaptive unicast and multicast in 3D mesh networks. In, pages 173 - 82. Los Alamitos, CA, USA. [More] 
  • Duato, J (1994). A theory of fault-tolerant routing in wormhole networks. In, pages 600 - 7. Los Alamitos, CA, USA. [More] 
  • Duato, J., Dao, B. V., Gaughan, P. T. & Yalamanchili, S (1994). Scouting: fully adaptive, deadlock-free routing in faulty pipelined networks. In, pages 608 - 613. Hsinchu, China. [More] 
  • Duato, J. & Lopez, P (1994). Performance evaluation of adaptive routing algorithms for k-ary n-cubes. In, pages 45 - 59. Berlin, Germany. [More] 
  • Duato, J (1994). Theory of fault-tolerant routing in wormhole networks. In, pages 600 - 607. Hsinchu, China. [More] 
  • Duato, J. (1994). Theory to increase the effective redundancy in wormhole networks. Parallel processing letters, 4(1-2), 125 - 138. [More] 
  • Duato, J. (1994). Improving the efficiency of virtual channels with time-dependent selection functions. Future Generation Computer Systems, 10(1), 45 - 58. [More] 
  • Duato, J. (1994). Improving the efficiency of virtual channels with time-dependent selection functions. Computers and Artificial Intelligence, 13(1), 25 - 44. [More] 
  • Liu, Z. & Duato, J (1994). Adaptive unicast and multicast in 3D mesh networks. In, pages 173 - 182. Wailea, HI, USA. [More] 
  • Duato, J. (1994). Theory to increase the effective redundancy in wormhole networks. Parallel Processing Letters, 4(1-2), 125 - 138. [More] 
  • Duato, J (1994). A necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks. In, pages 142 - 9. Boca Raton, FL, USA. [More] 
  • Duato, J., Dao, B. V., Gaughan, P. T. & Yalamanchili, S (1994). Scouting: fully adaptive, deadlock-free routing in faulty pipelined networks. In, pages 608 - 13. Los Alamitos, CA, USA. [More] 
  • Duato, J (1993). A theory to increase the effective redundancy in wormhole networks. In, pages 277 - 88. Netherlands. [More] 
  • Duato, J (1993). Theory to increase the effective redundancy in wormhole networks, pages 277 - 288. Palma de Mallorca, Spain. [More] 
  • Liu, Z., Duato, J. & Thorelli, L. - (1993). Grouping virtual channels for deadlock-free adaptive wormhole routing. In, pages 254 - 65. Berlin, Germany. [More] 
  • Lopez, P. & Duato, J (1993). Deadlock-free adaptive routing algorithms for the 3D-torus: limitations and solutions. In, pages 684 - 7. Berlin, Germany. [More] 
  • Duato, J (1993). Theory to increase the effective redundancy in wormhole networks. In, pages 277 - 277. Palma de Mallorca, Spain. [More] 
  • Duato, J. (1993). On the design of deadlock-free adaptive multicast routing algorithms. Parallel Processing Letters, 3(4), 321 - 33. [More] 
  • Duato, J (1993). New theory of deadlock-free adaptive multicast routing in wormhole networks. In, pages 64 - 71. Dallas, TX, USA. [More] 
  • Garcia, J. M. & Duato, J (1993). Dynamic reconfiguration of multicomputer networks: limitations and tradeoffs. In, pages 317 - 23. Los Alamitos, CA, USA. [More] 
  • Duato, J (1993). A new theory of deadlock-free adaptive multicast routing in wormhole networks. In, pages 64 - 71. Los Alamitos, CA, USA. [More] 
  • Duato, J. (1993). New theory of deadlock-free adaptive routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 4(12), 1320 - 1331. [More] 
  • Robles, A. & Duato, J (1992). Multilinks: a new approach to the design of adaptive routing algorithms for multicomputers. In, pages 405 - 10. Amsterdam, Netherlands. [More] 
  • Duato, J (1992). Impact of locality on the performance of some adaptive routing algorithms for the hypercube. In, pages 123 - 6. Amsterdam, Netherlands. [More] 
  • Duato, J. (1992). Impact of locality on the performance of some adaptive routing algorithms for the hypercube. Proceedings of the European Workshops on Parallel Computing, 123 - 123. [More] 
  • Garcia, J. M. & Duato, J (1992). An advanced environment for programming transputer networks with dynamic reconfiguration. In, pages 601 - 10. Barcelona, Spain. [More] 
  • Duato, J. (1992). Channel classes: a new concept for deadlock avoidance in wormhole networks. Parallel Processing Letters, 2(4), 347 - 54. [More] 
  • Duato, J (1992). Improving the efficiency of virtual channels with time-dependent selection functions. In, pages 635 - 50. Berlin, Germany. [More] 
  • Duato, J. (1991). Deadlock-free adaptive routing algorithms for multicomputers. Technique et Science Informatiques, 10(4), 275 - 85. [More] 
  • Garcia, J. M. & Duato, J (1991). An algorithm for dynamic reconfiguration of a multicomputer network. In, pages 848 - 55. Los Alamitos, CA, USA. [More] 
  • Duato, J (1991). Deadlock-free adaptive routing algorithms for multi-computers. Evaluation of a new algorithm. In, pages 840 - 840. Dallas, TX, USA. [More] 
  • Duato, J (1991). On the design of deadlock-free adaptive routing algorithms for multicomputers: theoretical aspects. In, pages 234 - 43. Berlin, Germany. [More] 
  • Duato, J (1991). On the design of deadlock-free adaptive routing algorithms for multicomputers: design methodologies. In, pages 390 - 405. Berlin, Germany. [More] 
  • Duato, J. & Pons, J (1989). Parallel triangularization of sparse matrices on distributed memory multiprocessors. In, pages 133 - 133. Rennes, France. [More] 
  • Duato, J. & Pons, J (1989). Parallel triangularization of sparse matrices on distributed memory multiprocessors. In, pages 133 - 46. Amsterdam, Netherlands. [More] 
  • Duato, J. & Gonzalez, A (1989). Multicomputer simulator. In, pages 367 - 8. Amsterdam, Netherlands. [More] 
  • Bru, R., Duato, J., Gonzalez, A., Mas, J. & Urbano, A (1989). Performance evaluation of a parallel algorithm for inverting dense matrices on distributed memory multiprocessors. In, pages 647 - 50. Los Altos, CA, USA. [More] 
  • Duato, J. & Gonzalez, A (1989). Multicomputer simulator. In, pages 367 - 367. Rennes, France. [More] 
  • Duato, J (1988). Parallel processing of the square root free Givens rotations by means of a transputer network. In, pages 257 - 64. Amsterdam, Netherlands. [More] 
  • Duato, J. & Albertos, P (1988). Simplified non-linear control of lifts. In, pages 149 - 54. Oxford, UK. [More] 
  • Duato, J (1988). A network topology for parallel processing on message-passing architectures. In, pages 167 - 73. St.Petersburg, FL, USA. [More] 
  • Duato, J (1988). A network topology with small diameter and constant node degree. In, pages 107 - 10. Anaheim, CA, USA. [More] 
  • Duato, J. & Pons, J (1988). A new family of network topologies for message-passing architectures. In, pages 111 - 14. Amsterdam, Netherlands. [More] 
  • Duato, J. (1987). Nonlinear digital control of three-phase asynchronous motors. Automatica e Instrumentacion, 21(170), 177 - 81. [More] 
  • Duato, J (1987). Fault-tolerant microprocessor-based control system for multiple lift installations. In, pages 209 - 13. Oxford, UK. [More] 
  • Duato, J., Albertos, P. & Valiente, J. M. (1985). Position and speed control for lift motors based on a micro. Regulacion y Mando Automatico, 19(147), 155 - 9. [More] 
  • Albertos, P. & Duato, J (1984). Position control with power induction motors. In, pages 547 - 52. Oxford, UK. [More] 
  • de la Puente, J., Crespo, A., Duato, J. & Albertos, P (1983). KERNEL FOR HIGH LEVEL REAL-TIME PROGRAMMING.. In, pages IEEE Region 8 -. Athens, Greece. [More] 
  • de la Puente, J., Crespo, A., Duato, J. & Albertos, P (1983). A kernel for high level real-time programming. In, pages 7 - 10. New York, NY, USA. [More] 

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