J!Research Staff Silla, Federico

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Silla, Federico

Personal Information:

Position: Researcher (Associate Professor) Silla, Federico
Phone or fax: +34963877904
Location: Valencia
Description:

You can see a more updated info at this website

Publications

  • Peña, A. J., Reaño, C., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J. (2014). A complete and efficient CUDA-sharing solution for HPC clusters. Parallel Computing, 40(10), 574-588. [More] 
  • Reaño, C., Silla, F., Peña, A. J., Shainer, G., Schultz, S., Gimeno, A. C. et al (2014). Boosting the performance of remote GPU virtualization using InfiniBand connect-IB and PCIe 3.0. In 2014 IEEE International Conference on Cluster Computing, CLUSTER 2014, Madrid, Spain, September 22-26, 2014, pages 266-267. [More] 
  • Iserte, S., Gimeno, A. C., Mayo, R., Quintana-Ortí, E. S., Silla, F., Duato, J. et al (2014). SLURM Support for Remote GPU Virtualization: Implementation and Performance Study. In 26th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2014, Paris, France, October 22-24, 2014, pages 318-325. [More] 
  • Reaño, C., Peña, A. J., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J (2013). Influence of InfiniBand FDR on the Performance of Remote GPU Virtualization. In International Conference on Cluster Computing (Cluster). [More] 
  • Reaño, C., Peña, A. J., Silla, F., Mayo, R., Quintana-Ortí, E. S. & Duato, J (2012). CU2rCU: towards the Complete rCUDA Remote GPU Virtualization and Sharing Solution. In 19th Annual International Conference on High Performance Computing (HiPC). [More] 
  • Reaño, C., Silla, F. & Vidal, G. (2012). CU2rCU: A CUDA-to-rCUDA Converter. Master Thesis, Universitat Politècnica de València, Spain. [More] 
  • Hernández, C., Roca, A., Silla, F., Flich, J. & Duato, J. (2012). On the Impact of Within-Die Process Variation in GALS-Based NoC Performance. IEEE Trans. on CAD of Integrated Circuits and Systems, 31(2), 294-307. [More] 
  • Strano, A., Hernández, C., Silla, F. & Bertozzi, D. (2011). Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design. International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 2(4), 20. [More] 
  • Hernández, C., Silla, F. & Duato, J (2011). Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process Variations. In Parallel Processing (ICPP), 2011 International Conference on, pages 41 -50. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Orti, E. S (2011). Performance of CUDA Virtualized Remote GPUs in High Performance Clusters. In Parallel Processing (ICPP), 2011 International Conference on, pages 365 -374. [More] 
  • Roca, A., Hernández, C., Flich, J., Silla, F. & Duato, J (2011). A Distributed Switch Architecture for On-Chip Networks. In Parallel Processing (ICPP), 2011 International Conference on, pages 21 -30. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al. (2011). Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 30(4), 534 -547. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Ort, E. S. (2011). Enabling CUDA acceleration within virtual machines using rCUDA. Proceedings of HiPC 2011. [More] 
  • Hernández, C., Roca, A., Flich, J., Silla, F. & Duato, J. (2011). Fault-Tolerant Vertical Link Design for Effective 3D Stacking. IEEE Computer Architecture Letters, 99(RapidPosts). [More] 
  • Hernández, C., Roca, A., Flich, J., Silla, F. & Duato, J. (2011). Characterizing the impact of process variation on 45 nm NoC-based CMPs. Journal of Parallel and Distributed Computing, 71(5), 651 - 663. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al (2011). Cost-efficient on-chip routing implementations for CMP and MPSoC systems. In, pages 534 - 547. 445 Hoes Lane / P.O. Box 1331, Piscataway, NJ 08855-1331, United States. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al. (2011). Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(4), 534 - 47. [More] 
  • Hernández, C., Silla, F. & Duato, J (2011). Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process Variations. In ICPP, pages 41-50. [More] 
  • Montaner, H., Silla, F., Froning, H. & Duato, J. (2011). A new degree of freedom for memory allocation in clusters. Cluster Computing, 1 - 23. [More] 
  • Roca, A., Flich, J., Silla, F. & Duato, J (2010). VCTlite: Towards an Efficient Implementation of Virtual Cut-Through Switching in On-Chip Networks. In 17th Int'l Conference on High Performance Computing (HiPC). Goa,India. [More] 
  • Gilabert, F., Silla, F., Gomez, M. E., Lodde, M., Roca, A., Flich, J. et al. (2010). Designing Network On-Chip Architectures in the Nanoscale Era. CRC Press. [More] 
  • Strano, A., Hernández, C., Silla, F. & Bertozzi, D (2010). Process variation and layout mismatch tolerant design of source synchronous links for GALS networks-on-chip. In System on Chip (SoC), 2010 International Symposium on, pages 43 -48. [More] 
  • Roca, A., Flich, J., Silla, F. & Duato, J (2010). A Latency-Efficient Router Architecture for CMP Systems. In Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on, pages 165 -172. [More] 
  • Montaner, H., Silla, F., Fröning, H. & Duato, J (2010). Getting Rid of Coherency Overhead for Memory-Hungry Applications. In Cluster Computing (CLUSTER), 2010 IEEE International Conference on, pages 48 -57. [More] 
  • Montaner, H., Silla, F. & Duato, J (2010). A practical way to extend shared memory support beyond a motherboard at low cost. In Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing, pages 155-166. Chicago, Illinois : ACM. [More] 
  • Rodrigo, S., Flich, J., Roca, A., Medardoni, S., Bertozzi, D., Camacho Villanueva, J. et al (2010). Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing. In Networks-on-Chip (NOCS), 2010 Fourth ACM/IEEE International Symposium on, pages 25 -32. [More] 
  • Hernández, C., Roca, A., Silla, F., Flich, J. & Duato, J (2010). Improving the Performance of GALS-Based NoCs in the Presence of Process Variation. In 2010 ACM/IEEE International Symposium on Networks-on-Chip (NOCS), pages 35 - 42. Grenoble, France : ACM. [More] 
  • Hernández, C., Silla, F. & Duato, J (2010). A Methodology for the Characterization of Process Variation in NoC Links. In 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pages 685-690. Dresden, Germany : EDDA. [More] 
  • Duato, J., Peña, A. J., Silla, F., Mayo, R. & Quintana-Ort, E. S (2010). rCUDA: Reducing the number of GPU-based accelerators in high performance clusters. In High Performance Computing and Simulation (HPCS), 2010 International Conference on, pages 224 - 231. Caen, France. [More] 
  • Duato, J., Igual, F. D., Mayo, R., Peña, A. J., Quintana-Orti, E. S. & Silla, F (2010). An efficient implementation of GPU virtualization in high performance clusters. In Euro-Par 2009 – Parallel Processing Workshops, pages 385 - 394. Delft, Netherlands. [More] 
  • Rodrigo, S., Hernández, C., Flich, J., Silla, F., Duato, J., Medardoni, S. et al (2009). Yield-oriented evaluation methodology of network-on-chip routing implementations. In System-on-Chip, 2009. SOC 2009. International Symposium on, pages 100 -105. [More] 
  • Hernández, C., Silla, F., Santonja, V. & Duato, J (2009). A new mechanism to deal with process variability in NoC links. In IPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium, pages IEEE Computer Societ. Rome, Italy. [More] 
  • Montaner, H., Santonja, V., Silla, F. & Duato, J (2008). Network reconfiguration suitability for scientific applications. In Parallel Processing, 2008. ICPP '08. 37th International Conference on, pages 312 - 319. Piscataway, NJ, USA. [More] 
  • Orduna, J. M., Silla, F. & Duato, J. (2004). On the development of a communication-aware task mapping technique. Journal of Systems Architecture, 50(4), 207 - 220. [More] 
  • Garcia, R., Duato, J. & Silla, F (2003). LSOM: A Link State protocol Over MAC addresses for metropolitan backbones using Optical Ethernet switches. In, pages 315 - 21. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M., Silla, F. & Duato, J. (2002). A clustering method for modeling the communication requirements of message-passing applications. Computing and Informatics, 21(1), 1 - 16. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2001). A tool for the design and evaluation of fibre channel storage area networks. In, pages 133 - 140. Seattle, WA, United states. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2001). Improving network performance by efficiently dealing with short control messages in fibre channel SANs. In, pages 901 - 10. Berlin, Germany. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2001). On the impact of message packetization in networks of workstations with irregular topology. In, pages 3 - 10. Los Alamitos, CA, USA. [More] 
  • Orduna, J. M., Silla, F. & Duato, J (2001). A new task mapping technique for communication-aware scheduling strategies. In, pages 349 - 54. Los Alamitos, CA, USA. [More] 
  • Duato, J., Robles, A., Silla, F. & Beivide, R. (2001). A Comparison of Router Architectures for Virtual Cut-Through and Wormhole Switching in a NOW Environment. Journal of Parallel and Distributed Computing, 61(2), 224 - 253. [More] 
  • Orduna, J. M., Silla, F. & Duato, J. (2001). Towards a communication-aware task scheduling strategy for heterogeneous systems. Computing and Informatics, 20(3), 245 - 67. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2001). On the scalability of topologies for storage area networks in building environments. In, pages 332 - 5. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2001). On the switch architecture for fibre channel storage area networks. In, pages 484 - 491. Kyongju, Korea, Republic of. [More] 
  • Martinez, J. C., Silla, F., Lopez, P. & Duato, J (2000). On the influence of the selection function on the performance of networks of workstations. In, pages 292 - 9. Berlin, Germany. [More] 
  • Silla, F. & Duato, J. (2000). On the use of virtual channels in networks of workstations with irregular topology. IEEE Transactions on Parallel and Distributed Systems, 11(8), 813 - 828. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Performance sensitivity of routing algorithms to failures in networks of workstations. In, pages 230 - 42. Berlin, Germany. [More] 
  • Molero, X., Silla, F., Rodriguez, F. & Santonja, V (2000). Design and implementation of a simulation tool for networks of workstations. In, pages 154 - 9. San Diego, CA, USA. [More] 
  • Molero, X., Silla, F. & Santonja, V (2000). Modeling and simulation of a network of workstations with wormhole switching. In, pages 299 - 306. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F. & Santonja, V. (2000). Modeling and simulation of a network of workstations with wormhole switching. Proceedings of the IEEE Annual Simulation Symposium, 299 - 306. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Modeling and simulation of storage area networks. In, pages 307 - 14. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). Performance analysis of storage area networks using high-speed LAN interconnects. In, pages 474 - 8. Los Alamitos, CA, USA. [More] 
  • Molero, X., Silla, F., Santonja, V. & Duato, J (2000). On the effect of link failures in fibre channel storage area networks. In, pages 102 - 11. Los Alamitos, CA, USA. [More] 
  • Silla, F. & Duato, J. (2000). High-performance routing in networks of workstations with irregular topology. IEEE Transactions on Parallel and Distributed Systems, 11(7), 699 - 719. [More] 
  • Silla, F. & Duato, J (1999). Is it worth the flexibility provided by irregular topologies in networks of workstations?. In, pages 47 - 61. Berlin, Germany. [More] 
  • Duato, J., Robles, A., Silla, F. & Beivide, R (1999). A comparison of router architectures for virtual cut-through and wormhole switching in a NOW environment. In, pages 240 - 7. Los Alamitos, CA, USA. [More] 
  • Duato, J., Robles, A., Silla, F. & Beivide, R. (1999). Comparison of router architectures for virtual cut-through and wormhole switching in a NOW environment. Proceedings of the International Parallel Processing Symposium, IPPS, 240 - 247. [More] 
  • Silla, F. & Duato, J (1998). On the use of virtual channels in networks of workstations with irregular topology. In, pages 203 - 16. Berlin, Germany. [More] 
  • Silla, F., Robles, A. & Duato, J (1998). Improving performance of networks of workstations by using Disha Concurrent. In Lai & TH (editors), 1998 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING - PROCEEDINGS, pages 80-87. [More] 
  • Silla, F., Robles, A. & Duato, J (1998). Improving performance of networks of workstations by using Disha Concurrent. In, pages 80 - 7. Los Alamitos, CA, USA. [More] 
  • Silla, F., Malumbres, M. P., Duato, J., Dai, D. & Panda, D. K (1998). Impact of adaptivity on the behavior of networks of workstations under bursty traffic. In, pages 88 - 95. Los Alamitos, CA, USA. [More] 
  • Silla, F., Duato, J., Sivasubramaniam, A. & Das, C. R (1998). Virtual channel multiplexing in networks of workstations with irregular topology. In, pages 147 - 54. Los Alamitos, CA, USA. [More] 
  • Silla, F. & Duato, J (1997). Tuning the number of virtual channels in networks of workstations. In, pages 72 - 5. Raleigh, NC, USA. [More] 
  • Silla, F. & Duato, J (1997). Improving the efficiency of adaptive routing in networks with irregular topology. In, pages 330 - 335. Bangalore, India. [More] 
  • Silla, F. & Duato, J (1997). Improving the efficiency of adaptive routing in networks with irregular topology. In, pages 330 - 5. Los Alamitos, CA, USA. [More] 
  • Duato, J., Lopez, P., Silla, F. & Yalamanchili, S (1996). A high performance router architecture for interconnection networks. In, pages 61 - 8. Los Alamitos, CA, USA. [More] 

Theses

 

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