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Sahuquillo, Julio

Personal Information:
Position:	Researcher (Associate Professor)
Phone or fax:	+34963877007x77577
Location:	Valencia
Publications
Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2013). Using huge pages and performance counters to determine the LLC architecture. In International Conference on Computational Science, ICCS'13, Barcelona, Jun 5-7. [More]  Feliu, J., Petit, S., Sahuquillo, J. & Duato, J. (2013). Cache-hierarchy Contention Aware Scheduling in CMPs. IEEE Transactions on Parallel and Distributed Systems. [More]  Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2013). L1-Bandwidth Aware Thread Allocation in Multicore SMT Processors. In 22nd International Conference on Parallel Architectures and Compilation Techniques, PACT'13, Edinburgh, Scotland, Sep 7-11. [More]  Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2012). Planificació considerando el ancho de banda de la jerarquía de cache. In XIII Jornadas de Paralelismo, JP 2012, Elche, Sep 19-21, pages 472-477. [More]  Feliu, J., Sahuquillo, J., Petit, S. & Duato, J (2012). Understanding Cache Hierarchy Contention in CMPs to Improve Job Scheduling. In 26th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2012, Shanghai, China, May 21-25, pages 508-519. [More]    [View All]
Projects
Server architectures, applications and services High-performance, Reliable Architectures for Data Centers and Internet Servers
Theses
Out-of-Order Retirement of Instructions in Superscalar, Multithreaded, and Multicore Processors