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Ubal, Rafael

Personal Information:
Position:	Former Member
Phone or fax:	+34963877007x75745
Location:	Valencia
Publications
Petit, S., Ubal, R., Sahuquillo, J. & Lopez, P (2009). A power-aware hybrid RAM-CAM renaming mechanism for fast recovery. In Computer Design, 2009. ICCD 2009. IEEE International Conference on, pages 150 -157. [More]  Petit, S., Ubal, R., Sahuquillo, J., Lopez, P. & Duato, J (2009). An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions. In Nunez, A. & Carballo, P. P. (editors), Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on, pages 635 -642. [More]  Ubal, R., Sahuquillo, J., Petit, S. & Lopez, P (2007). Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. In Computer Architecture and High Performance Computing, 2007. SBAC-PAD 2007. 19th International Symposium on, pages 62 -68. [More]  Ubal, R., Sahuquillo, J., Petit, S., Hassan, H. & Lopez, P (2007). Leakage Current Reduction in Data Caches on Embedded Systems. In Intelligent Pervasive Computing, 2007. IPC. The 2007 International Conference on, pages 45 -50. [More]  Ubal, R., Sahuquillo, J., Petit, S., Lopez, P. & Duato, J (2007). VB-MT: Design Issues and Performance of the Validation Buffer Microarchitecture for Multithreaded Processors. In Parallel Architecture and Compilation Techniques, 2007. PACT 2007. 16th International Conference on, pages 429 -429. [More]    [View All]
Projects
Server architectures, applications and services High-performance, Reliable Architectures for Data Centers and Internet Servers
Theses
Out-of-Order Retirement of Instructions in Superscalar, Multithreaded, and Multicore Processors