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Leakage Current Reduction in Data Caches on Embedded Systems
| Research Area: | Processor Architecture | Year: | 2007 |
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| Type of Publication: | In Proceedings | Keywords: | ARM Cortex A8 processor;cache memories;data caches;high-end embedded microprocessor;leakage energy consumption reduction;pervasive devices;cache storage;microprocessor chips;power consumption;ubiquitous computing; |
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| Book title: | Intelligent Pervasive Computing, 2007. IPC. The 2007 International Conference on | ||
| Pages: | 45 -50 | ||
| Month: | oct. | ||
| Abstract: |
Nowadays, embedded systems can be found in a wide range of pervasive devices (e.g., smart phones, PDAs, or video/digital cameras). These devices contain large cache memories, whose power consumption can reach about 50% of the total spent energy, from which leakage energy is the predominant fraction in current technologies. This paper proposes a technique to reduce leakage energy consumption in data caches on embedded systems, which is based on the fact that most stored bits take a logical value of zero. The proposed technique has been evaluated on a model of a contemporary high-end embedded microprocessor, namely the ARM Cortex A8 processor, executing a set of standard embedded benchmarks. Experimental results show that leakage energy savings reach about 40% with no IPC loss.
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